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2.1CMOS制造工艺流程简介•WewilldescribeamodernCMOSprocessflow.•Processdescribedhererequires16masksand>100processsteps.1第二章CMOS制备基本流程StagesofICFabrication2•

InthesimplestCMOStechnologies,weneedtorealizesimplyNMOSandPMOStransistorsforcircuitslikethoseillustratedbelow.CM

OSDigitalGates反相电路或非门：同时输入低电平时才能获得高电平输出3PMOSandNMOSwafercrosssectionafterfabrication2-LevelMetalCMOS两层互连布线的CMOS4•有源器件（

MOS、BJT等类似器件），必须在外加适当的偏置电压情况下，器件才能正常工作。•对于MOS管，有源区分为源区和漏区，在进行互联之前，两者没有差别。••••••••ChoosingaSubstrateActiveRegionN

andPWellGateTiporExtensionSourceandDrainContactandLocalInterconnectMultilevelMetalizationProcessingPhases51µmPhotoresist40

nmSiO2Choosethesubstrate(type,orientation,resistivity,wafersize)•Initialprocessing:-Wafercleaning-thermaloxidation,H2O(≈40nm,15min.@900ºC)-ni

trideLPCVD(低压化学气相沉积)(≈80nm@800ºC)•Substrateselection:-moderatelyhighresistivity(25-50ohm-cm)-(100)orientation-P-type.80nmS

i3N4ChoosingaSubstrateSi,(100),PType,25~50Ωcm1stMaskPhotoresist•spinningandbaking@100ºC(≈0.5-1.0µm)62.2有源区的形成•Photolithography-Mask#1pa

tternalignmentandUVexposure-Rinseawaynon-patternPR-DryetchtheNitridelayer--PlasmaetchwithFluorineCF4orNF4Plas

ma-StripPhotoresist(H2SO4或O2plasma)ActiveAreaDefinition(主动区)SiO2Si3N4Photoresist7•WetOxide(thickSiO2)-H2O(≈500nm,90min.@

1000ºC)•StripNitridelayer-Phosophoricacid(磷酸)orplasmaetch，选择性问题FieldOxideGrowth-LOCOS:LocalOxidationofSilicon(局部硅氧化工艺)SiO2Si3N4•薄的SiO2层，厚的Si3N4层，避免鸟喙

(bird’sbeak)的影响8•场区:很厚的氧化层，位于芯片上不做晶体管、电极接触的区域，可以起到隔离晶体管的作用。•Photolithography(套刻)-Mask#2patternalignmentandUV

exposure•IonImplantation离子注入-B+ionbombardment-PenetratethinSiO2andfieldSiO2--反型：半导体表面的少数载流子浓度等于体内的多数载流子浓度时，半导体表面开始反型。-150-200keVfor1013cm

-2--ImplantationEnergyandtotaldoseadjustedfordepthandconcentrationP-wellFabrication•StripPhotoresist-Rinseawaynon-patternPR2.3N阱和P阱的

形成SiO2Photoresist9•IonImplantation-P+ionbombardment-PenetratethinSiO2andfieldSiO2-300-400keVfor1013cm-2--ImplantationEnergyandtotaldo

seadjustedfordepthandconcentration•StripPhotoresistN-wellFabrication•Photolithography-Mask#3patternalignmentandUVexposure-Rin

seawaynon-patternPR10•ThermalAnneal(热退火)-Repaircrystallatticestructuredamageduetoimplantation•DryFurnace(N2ambient，防止氧化层生

成)-Anneal30min@800˚CorRTA(快速热退火)10sec@1000˚C-Drive-in4-6hours@1000˚C-1100˚CThermalAnnealandDiffusion•NandP

Drive-in(扩散推进)-Thermaldiffusionofdopanttoshallowerthandesireddepth--Drive-inisacumulativeprocess!11•Photolithography-Mask#4patternal

ignmentandUVexposure-Rinseawaynon-patternPR-B+ionbombardment-50-75keVfor1-5×1012cm-2--ImplantationEnergyandtotaldoseadjustedfordepthandconcentratio

n•StripPhotoresistThresholdAdjustment,P-typeNMOS•IonImplantation2.4栅电极的制备开启电压调整12调整之前P阱的掺杂浓度调整时的注入剂量ThresholdAdjustment,N-typePMOS•Photolithog

raphy-Mask#5patternalignmentandUVexposure-Rinseawaynon-patternPR-As+ionbombardment-75-100keVfor1-5×1012cm-2--ImplantationEnergyandtotaldo

seadjustedfordepthandconcentration•StripPhotoresist•IonImplantation13•Removeexistinggateregionoxide•FurnaceSteps-ThermalAnneal-Oxidegrowth

3-5nm--O2ambient--0.5-1hour@800°CGateOxideGrowth栅极氧化层生长-HFetch，具有良好的选择性--DryFurnace(N2ambient)--30min@800˚C14•LPCVDD

epositionofSi-Silane硅烷•Amorphousorpolycrystallinesiliconlayerresults•IonImplantation-P+orAs+(N+)implantdopesthepoly(typically5

×1015cm-2)PolysiliconGateDeposition•0.3-0.5umSiO2多晶硅薄膜15热分解•Photolithography-Mask#6patternalignmentandUVexposure•PlasmaEtch-Anisotropicet

ch各向异性蚀刻--Verticaletchratehigh--LateraletchratelowGatePatterning（栅极的图形化）-Rinseawaynon-patternPR•Clorin

e(氯)orBromine(溴)basedforSiO2selectivity16目标：•NMOS器件中的N-注入区•PMOS器件中的P-注入区•多晶硅栅的两侧形成侧壁隔离层的薄氧化层2.5前端或延伸区(LDD)的形成17LDD:•LightlyDopedDrain(轻掺

杂漏)•Reduceshortchanneleffectsduetogatevoltagemagnitudesandelectricfields•SourceandDrainmustbelayeredasNM

OS:N+N-PorPMOS:P+P-NExtension(LDD)FormationNMOS•Photolithography-Mask#7patternalignmentandUVexposure-Rinseaway

non-patternPR-P+ionbombardment-50keVfor5×1013cm-2•StripPhotoresist•IonImplantation18•Photolithography•Mask#8patternalignm

entandUVexposure•Rinseawaynon-patternPR•IonImplantation•B+ionbombardment•50keVfor5×1013cm-2•StripPhotoresistExte

nsion(LDD)FormationPMOS19SiO2隔离介质层•CVDorLPCVDDepositionofSiO2•SilaneandOxygenOr•0.5um•Providesspacingbetweengateandsourc

e-drain.SiO2SpacerDeposition20•Photolithography•Mask#6oversizedpatternalignmentandUVexposure•Rinseawaynon-patternPR•Verticaletchratehigh•Lateraletchr

atelow•StripPhotoresistAnisotropicSpacerEtch•PlasmaEtch•Anisotropicetch•Flourinebased21•ScreenOxideGrowth•ThinSiO2layer~10nmtoscatterth

eimplantedions•Photolithography•Mask#9patternalignmentandUVexposure•Rinseawaynon-patternPR•IonImplantation•As+ionbombardment•75k

eVfor2-4×1015cm-2•StripPhotoresistNMOSSourceandDrainImplant2.6源漏区的形成Arsenic•Reducechanneling22•Photolithography•Mask#10patternalignme

ntandUVexposure•Rinseawaynon-patternPR•IonImplantation•B+ionbombardment•5-10keVfor1-3×1015cm-2•StripPhotoresistPMOSSourceandDrainImplant23•N+an

dP+Drive-in•Thermaldiffusionofdopanttoshallowerthandesireddepth•Drive-inisacumulativeprocess!•DryFurnace(N2ambient)•Anneal30min@900˚CorRTA60sec@

1000˚C-1050˚CTransientEnhancedDiffusion(TED瞬态增强扩散)•HigherthannormaldiffusivityduetocrystaldamageThermalAnnealing•ThermalAnneal•Repaircrystalla

tticestructuredamageduetoimplantation242.7接触与局部互联的形成ContactsandInterconnects•Titaniumsputteringlocalcontacts•ConformalCoatwithSiO2

•Planarization•TungstenPlugvias•AluminumMetalDeposition•Repeat–Coat–Planarize–Plug–Metaldeposition25•HFetchtoremovethi

nSiO2•Removescreenoxidefromdrain,sourceandploygateregions•Dip(浸)forafewsecondswithHFContactOpeningsLDDandSidewallstructure•NMOS:

LateralN+N-PN-N+•PMOS:LateralP+P-NP-P+26TitaniumDeposition•Tiisdepositedbysputtering(typically100nm).•TitargethitwithAr+ionsinavacuumchamber•TheTii

sreactedinanN2ambient•FormsTiSi2andTiN(typically1min@600-700˚C).•TiSi2hasexcellentcontactcharacteristics(良好的导体

)•TiNdoesnot,butcanbeusedforlocalwiring(导电材料，短程互连布线)TiSi2TiN27•Photolithography•Mask#11patternalignmentandUVexposure•Rinseawaynon-pat

ternPR•TiNetch•NH4OH:H2O2:H2O(1:1:5)•StripPhotoresistLocalTiNInterconnect•ThermalTreatinAr减小电阻•1min@800°C28用TiN作为局部互连引线•ConformallayerofSiO

2isdepositedbyCVDorLPCVD(typically1µm)•PSG(磷硅玻璃)orBPSG(硼磷硅玻璃)•磷：Surfacepassivation(表面钝化)•硼：Glassreflowforpartialplanarization(加热，令表面平

整)•ChemicalMechanicalPolishing(CMP化学机械抛光)•Planarizethewafersurface平坦化•PolishwithhighpHsilicaslurry(硅酸盐研磨浆料)Conforma

lCoatandPlanarize2.8多层金属互连的形成SiO229表面不平坦带来很多问题,两种解决方法：•Photolithography•Mask#12patternalignmentandUVexpo

sure•Rinseawaynon-patternPR•SiO2plasmaetch•Anisotropicetch•StripPhotoresistViasto1stMetal30•选择第一层金属布线需要与下层器件结构形成连接的接触孔位置•接触孔形成ViaDeposition–Tung

stenPlugs(插头)•TiNorTi/TiNbarrierlayer粘结层/阻挡层，增强金属与SiO2的粘附性•SputteringorCVD(fewtensofnm)•CVDTungsten(W)•ChemicalMechanicalPolishing(CMP)•Planarizeth

ewafersurface•PolishwithhighpHsilicaslurry31•EtchContactHoles(接触孔的蚀刻)orLineTrenches(沟道)•Filletchedregions(蚀刻区的填充)•Planariz

e(平坦化)–CMPprocess–Alsoremovesmaterialthat“overflowedholesortrenches”DamasceneProcess大马士革镶嵌工艺32大马士革镶嵌工艺包括：•StripPhotoresistMetal#1Deposition第一层金属布线•P

hotolithography•Mask#13patternalignmentandUVexposure•Rinseawaynon-patternPR•Anisotropicplasmaetch33SiO2Al光刻胶•SputteredAluminum•Alwithsmallamountsof

SiandCu-Cureduceselectromigration避免电迁移现象带来的断路-Si降低接触电阻MultipleMetalLayers•DepositsOxideLayer•CMP•PhotolithographyMask#1

4•EtchVias•Depositviamaterial•CMP•DepositNextMetalLayer•PhotolithographyMask#15•FinalpassivationlayerofSi3N4isdepositedbyPECVDandpatternedwi

thMask#16.防止Na+、K+污染和封装中的机械损伤•Finalannealandalloyinforminggas(10%H2inN2)•30min@400-450°C•形成良好的欧姆接触，降低Si/SiO2界面的电荷34

SiO2WTiNSi3N4或SiO2Intelµprocessorchip52MBSRAMchipsona12”wafer•Photosofstate-of-the-artCMOSchips(fromIntelwebsite).•90nmtechnology.35SummaryofKeyid

eas•ThischapterservesasanintroductiontoCMOStechnology.•Itprovidesaperspectiveonhowindividualtechnologieslikeoxidationandionimplantationareact

uallyused.•TherearemanyvariationsonCMOSprocessflowsusedinindustry.•Theprocessdescribedhereisintendedtoberepresent

ative,althoughitissimplifiedcomparedtomanycurrentprocessflows.Perhapsthemostimportantpointisthatwhileindividualprocessstepsli

keoxidationandionimplantationareusuallystudiedasisolatedtechnologies,theiractualuseiscomplicatedbythefactthatICmanufacturingconsistsofmanysequentia

lsteps,eachofwhichmustintegratetogethertomakethewholeprocessflowworkinmanufacturing.36作业：MEMS器件制备最早的MEMS执行器之一：静电驱动的微马达37