【文档说明】CMOS制造工艺流程简介.pptx，共(37)页，1019.878 KB，由精品优选上传

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2.1CMOS制造工艺流程简介•WewilldescribeamodernCMOSprocessflow.•Processdescribedhererequires16masksand>100processst

eps.1第二章CMOS制备基本流程StagesofICFabrication2•InthesimplestCMOStechnologies,weneedtorealizesimplyNMOSandPMOStransistorsforcir

cuitslikethoseillustratedbelow.CMOSDigitalGates反相电路或非门：同时输入低电平时才能获得高电平输出3PMOSandNMOSwafercrosssectionafterfabrication2-LevelMetalCMOS两层互连布线的CMOS

4•有源器件（MOS、BJT等类似器件），必须在外加适当的偏置电压情况下，器件才能正常工作。•对于MOS管，有源区分为源区和漏区，在进行互联之前，两者没有差别。••••••••ChoosingaSubstrateActiveRegi

onNandPWellGateTiporExtensionSourceandDrainContactandLocalInterconnectMultilevelMetalizationProcessingPhases51µmPhotoresi

st40nmSiO2Choosethesubstrate(type,orientation,resistivity,wafersize)•Initialprocessing:-Wafercleaning-thermaloxidation,H2O(≈40nm,15min.@900ºC)-nit

rideLPCVD(低压化学气相沉积)(≈80nm@800ºC)•Substrateselection:-moderatelyhighresistivity(25-50ohm-cm)-(100)orientation-P-type.80nmSi3N4Ch

oosingaSubstrateSi,(100),PType,25~50Ωcm1stMaskPhotoresist•spinningandbaking@100ºC(≈0.5-1.0µm)62.2有源区的形成•Photolithography-Mask#1patternalig

nmentandUVexposure-Rinseawaynon-patternPR-DryetchtheNitridelayer--PlasmaetchwithFluorineCF4orNF4Plasma-Strip

Photoresist(H2SO4或O2plasma)ActiveAreaDefinition(主动区)SiO2Si3N4Photoresist7•WetOxide(thickSiO2)-H2O(≈500nm,90min.@1000ºC)•StripNitridelayer-Phosopho

ricacid(磷酸)orplasmaetch，选择性问题FieldOxideGrowth-LOCOS:LocalOxidationofSilicon(局部硅氧化工艺)SiO2Si3N4•薄的SiO2层，厚的Si3N4层，避免鸟喙(bird’sbeak)的影响8•场区:很厚

的氧化层，位于芯片上不做晶体管、电极接触的区域，可以起到隔离晶体管的作用。•Photolithography(套刻)-Mask#2patternalignmentandUVexposure•IonImplantation离子注入-B+ionbombardmen

t-PenetratethinSiO2andfieldSiO2--反型：半导体表面的少数载流子浓度等于体内的多数载流子浓度时，半导体表面开始反型。-150-200keVfor1013cm-2--Implant

ationEnergyandtotaldoseadjustedfordepthandconcentrationP-wellFabrication•StripPhotoresist-Rinseawayn

on-patternPR2.3N阱和P阱的形成SiO2Photoresist9•IonImplantation-P+ionbombardment-PenetratethinSiO2andfieldSiO2-300-400keVfor1013cm-2--Implantatio

nEnergyandtotaldoseadjustedfordepthandconcentration•StripPhotoresistN-wellFabrication•Photolithography-Mask#3patternalignmentandUVexposur

e-Rinseawaynon-patternPR10•ThermalAnneal(热退火)-Repaircrystallatticestructuredamageduetoimplantation•DryFurnace(N2ambient，防止氧化层生成)

-Anneal30min@800˚CorRTA(快速热退火)10sec@1000˚C-Drive-in4-6hours@1000˚C-1100˚CThermalAnnealandDiffusion•NandPDrive-in(扩散推进)-Thermaldiffusionofdopanttosha

llowerthandesireddepth--Drive-inisacumulativeprocess!11•Photolithography-Mask#4patternalignmentandUVexposure-Rinsea

waynon-patternPR-B+ionbombardment-50-75keVfor1-5×1012cm-2--ImplantationEnergyandtotaldoseadjustedfordepthandconcentration•StripPhotoresistTh

resholdAdjustment,P-typeNMOS•IonImplantation2.4栅电极的制备开启电压调整12调整之前P阱的掺杂浓度调整时的注入剂量ThresholdAdjustment,N-typePMOS•Photolithograph

y-Mask#5patternalignmentandUVexposure-Rinseawaynon-patternPR-As+ionbombardment-75-100keVfor1-5×1012cm

-2--ImplantationEnergyandtotaldoseadjustedfordepthandconcentration•StripPhotoresist•IonImplantation13•Removeexistinggateregionoxide•FurnaceSteps-The

rmalAnneal-Oxidegrowth3-5nm--O2ambient--0.5-1hour@800°CGateOxideGrowth栅极氧化层生长-HFetch，具有良好的选择性--DryFurn

ace(N2ambient)--30min@800˚C14•LPCVDDepositionofSi-Silane硅烷•Amorphousorpolycrystallinesiliconlayerresults•IonImplantation-P+orAs

+(N+)implantdopesthepoly(typically5×1015cm-2)PolysiliconGateDeposition•0.3-0.5umSiO2多晶硅薄膜15热分解•Photolithography-Mask#6patternalignmentandUVe

xposure•PlasmaEtch-Anisotropicetch各向异性蚀刻--Verticaletchratehigh--LateraletchratelowGatePatterning（栅极的图形化）-Rins

eawaynon-patternPR•Clorine(氯)orBromine(溴)basedforSiO2selectivity16目标：•NMOS器件中的N-注入区•PMOS器件中的P-注入区•多晶硅栅的两侧形成侧壁隔离层的薄氧化层2.5前端或延伸区(LDD)的形成17LDD:•L

ightlyDopedDrain(轻掺杂漏)•Reduceshortchanneleffectsduetogatevoltagemagnitudesandelectricfields•SourceandDrainmustbelayeredasNMOS:N+N-PorPMOS:P

+P-NExtension(LDD)FormationNMOS•Photolithography-Mask#7patternalignmentandUVexposure-Rinseawaynon-patternPR-P+i

onbombardment-50keVfor5×1013cm-2•StripPhotoresist•IonImplantation18•Photolithography•Mask#8patternalignmentandUVexposure•Rinseawaynon-p

atternPR•IonImplantation•B+ionbombardment•50keVfor5×1013cm-2•StripPhotoresistExtension(LDD)FormationPMOS19SiO2隔离介质层•C

VDorLPCVDDepositionofSiO2•SilaneandOxygenOr•0.5um•Providesspacingbetweengateandsource-drain.SiO2SpacerDeposition20•Photolithograph

y•Mask#6oversizedpatternalignmentandUVexposure•Rinseawaynon-patternPR•Verticaletchratehigh•Lateraletchratelow•StripPhotor

esistAnisotropicSpacerEtch•PlasmaEtch•Anisotropicetch•Flourinebased21•ScreenOxideGrowth•ThinSiO2layer~

10nmtoscattertheimplantedions•Photolithography•Mask#9patternalignmentandUVexposure•Rinseawaynon-patternPR

•IonImplantation•As+ionbombardment•75keVfor2-4×1015cm-2•StripPhotoresistNMOSSourceandDrainImplant2.6源漏区的形成Arsenic•Reducechanneling22•Photolithogra

phy•Mask#10patternalignmentandUVexposure•Rinseawaynon-patternPR•IonImplantation•B+ionbombardment•5-10keVfor1-3×1015cm-2•StripPhotoresistP

MOSSourceandDrainImplant23•N+andP+Drive-in•Thermaldiffusionofdopanttoshallowerthandesireddepth•Drive-inisacumulativeprocess!•DryFurnace(N2ambie

nt)•Anneal30min@900˚CorRTA60sec@1000˚C-1050˚CTransientEnhancedDiffusion(TED瞬态增强扩散)•HigherthannormaldiffusivityduetocrystaldamageThermalAnn

ealing•ThermalAnneal•Repaircrystallatticestructuredamageduetoimplantation242.7接触与局部互联的形成ContactsandInterconnects•Titaniumsputter

inglocalcontacts•ConformalCoatwithSiO2•Planarization•TungstenPlugvias•AluminumMetalDeposition•Repeat–Coat–Planarize–Plug–Metaldeposition2

5•HFetchtoremovethinSiO2•Removescreenoxidefromdrain,sourceandploygateregions•Dip(浸)forafewsecondswithHFContactOpeningsLDDan

dSidewallstructure•NMOS:LateralN+N-PN-N+•PMOS:LateralP+P-NP-P+26TitaniumDeposition•Tiisdepositedbysputtering(typically

100nm).•TitargethitwithAr+ionsinavacuumchamber•TheTiisreactedinanN2ambient•FormsTiSi2andTiN(typically1min@600-700˚C

).•TiSi2hasexcellentcontactcharacteristics(良好的导体)•TiNdoesnot,butcanbeusedforlocalwiring(导电材料，短程互连布线)T

iSi2TiN27•Photolithography•Mask#11patternalignmentandUVexposure•Rinseawaynon-patternPR•TiNetch•NH4OH:H2O2:H

2O(1:1:5)•StripPhotoresistLocalTiNInterconnect•ThermalTreatinAr减小电阻•1min@800°C28用TiN作为局部互连引线•ConformallayerofSiO2isdepo

sitedbyCVDorLPCVD(typically1µm)•PSG(磷硅玻璃)orBPSG(硼磷硅玻璃)•磷：Surfacepassivation(表面钝化)•硼：Glassreflowforpartialplanarizati

on(加热，令表面平整)•ChemicalMechanicalPolishing(CMP化学机械抛光)•Planarizethewafersurface平坦化•PolishwithhighpHsilicaslurry(硅酸盐研磨浆料)ConformalCoatandPlanarize2.8

多层金属互连的形成SiO229表面不平坦带来很多问题,两种解决方法：•Photolithography•Mask#12patternalignmentandUVexposure•Rinseawaynon-patternPR•SiO2plasmaetch•A

nisotropicetch•StripPhotoresistViasto1stMetal30•选择第一层金属布线需要与下层器件结构形成连接的接触孔位置•接触孔形成ViaDeposition–TungstenPlugs(插头)•TiNorTi

/TiNbarrierlayer粘结层/阻挡层，增强金属与SiO2的粘附性•SputteringorCVD(fewtensofnm)•CVDTungsten(W)•ChemicalMechanicalPolishing(CMP)•Planarizethewa

fersurface•PolishwithhighpHsilicaslurry31•EtchContactHoles(接触孔的蚀刻)orLineTrenches(沟道)•Filletchedregions(蚀刻区的填充)•Planarize(平坦化)–CMPprocess–A

lsoremovesmaterialthat“overflowedholesortrenches”DamasceneProcess大马士革镶嵌工艺32大马士革镶嵌工艺包括：•StripPhotoresistMetal#1Deposition第一层金属布线•Photolithography•M

ask#13patternalignmentandUVexposure•Rinseawaynon-patternPR•Anisotropicplasmaetch33SiO2Al光刻胶•SputteredAluminum•AlwithsmallamountsofSiandCu-Cureducese

lectromigration避免电迁移现象带来的断路-Si降低接触电阻MultipleMetalLayers•DepositsOxideLayer•CMP•PhotolithographyMask#14•EtchVias•De

positviamaterial•CMP•DepositNextMetalLayer•PhotolithographyMask#15•FinalpassivationlayerofSi3N4isdepositedbyP

ECVDandpatternedwithMask#16.防止Na+、K+污染和封装中的机械损伤•Finalannealandalloyinforminggas(10%H2inN2)•30min@400-450

°C•形成良好的欧姆接触，降低Si/SiO2界面的电荷34SiO2WTiNSi3N4或SiO2Intelµprocessorchip52MBSRAMchipsona12”wafer•Photosofstate-of-the-artCMOSchips(fromIntelwebs

ite).•90nmtechnology.35SummaryofKeyideas•ThischapterservesasanintroductiontoCMOStechnology.•Itprovidesaper

spectiveonhowindividualtechnologieslikeoxidationandionimplantationareactuallyused.•Therearemanyvariat

ionsonCMOSprocessflowsusedinindustry.•Theprocessdescribedhereisintendedtoberepresentative,althoughitissimplifiedcomparedtomanycurr

entprocessflows.Perhapsthemostimportantpointisthatwhileindividualprocessstepslikeoxidationandionimplantationareusually

studiedasisolatedtechnologies,theiractualuseiscomplicatedbythefactthatICmanufacturingconsistsofmanysequentialsteps,eachofwhichmustintegratetogether

tomakethewholeprocessflowworkinmanufacturing.36作业：MEMS器件制备最早的MEMS执行器之一：静电驱动的微马达37